STMicroelectronics Claims Non-Volatile Memory Speed Record

STMicroelectronics, Inc.ility to clock in serial data at 20 MHz, <%=company%> is claiming a speed record for its M25P10, a 1-Mbit Paged non-volatile (NV) memory. The first member in the M25Pxx family of high-speed low-voltage serial NV memories, the M25P10 reads and writes data through a four-wire bus, compatible with the SPI bus, and guarantees downward and upward compatibility as higher and lower density members of the M25Pxx family are introduced. To reduce power consumption, the family operates from a single supply voltage of 2.7V to 3.6V and features a deep power-down mode that draws just 1 µA (typical value).

The high-speed serial solution offered with the M25P10 creates added-value for applications that require fast download of code, such as: personal computer add-on cards, including graphic cards, SCSI cards and network cards; hard disk drives; digital cameras; and car radios.

The M25P10 allows reprogramming in the field and fast and easy programming on the production line and is therefore also well suited for storing large parameter sets that are seldom refreshed, such as Asian characters or OSD messages on displays integrated in printers, high-end appliances and car dashboards. Moreover, a write protection feature can be applied on part or all of the memory.

For ease of use, and to minimize the number of instructions, the M25P10 allows random read and sequential read. At 2.7V, it takes just 52 ms to read the full 1Mbit memory. The M25P10's 1-Mbit capacity comprises 1024 x 128-byte pages that can each be typically programmed in just 3 ms, slashing the time it takes to enter initial code or parameter values during end product manufacturing down to 3.1 s typical for the complete 1 Mbits. In addition, data can be erased either sector by sector (one sector is 256 Kbits), allowing partial updates, or at once across the whole chip.

In addition to an easy upgrade path to greater memory density, the M25P10's serial interface, consisting of four lines - clock, chip select, data in, and data out - dramatically reduces the application chipset or ASIC pin count, therefore generating opportunities for the end-application to offer more features, to be more integrated and more cost competitive. Moreover, the interface is compatible with the SPI bus found on many microcontrollers.

Drawing on ST's high-endurance CMOS flash technology, the M25P10 allows at least 10,000 program-erase cycles per sector. The M25P10 retains data for at least 20 years and operates at temperatures from –40°C to 85°C. The memory is available in both wide and narrow SO8 packages A 512-Kbit version, the MP25P05, will be available soon with 2-Mbit and 4-Mbit versions planned.

Engineering samples of the M25P10 are available now, with qualification samples planned for June 2000. In addition, ST is also making available a programer/reader evaluation kit.

Edited by David Maliniak