32-Channel Digital Receiver
Mercury Systems, Inc.536 can be configured with up to 32-channels of narrowband receivers to perform frequency down conversion, lowpass filtering and decimation of the sampled output. Each of the 32 receivers can independently select any one of the four A/D input sources.
Mercury Systems, Inc.536 receiver output signals are first processed in a FPGA (programmable logic array) that performs serial-to-parallel conversion as well as some simple, high-speed pre-processing tasks including summation of multiple channels for beamforming applications.
The FPGA outputs are then sent into FIFO memory buffers up to 64k samples deep. The FIFO outputs can be delivered to any of Pentek's DSP boards, to the VMEbus, or to an on-board TMS320C40 DSP capable of performing demodulation, decryption and other signal analysis tasks.
The board can be configured to accept three 16-bit inputs or four 14-bit inputs. Each of the two 32-bit front panel FPDP connectors supplies two parallel digital inputs at clock rates up to 40 MHz. These 14- or 16-bit inputs may be driven from Pentek's extensive family of 64xx series dual channel A/D converters boards with sampling rates ranging from 250 kHz to 40 MHz with accuracies from 12 to 16 bits. The 6536 is also compatible with Pentek's high-speed buffer memory board, 'C6x DSP processor boards, as well as the many FPDP products available from other vendors.
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