Clock Generator That Supports Emerging Cell Processor Applications
Cypress Semiconductor Corporation, has introduced a clock generator specifically developed to provide the high performance clock signals required for both the Rambus Inc. XDR™ (Extreme Data Rate) memory systems and the FlexIO™ processor bus interface supporting applications that employ the new "Cell processor" architecture.
Cypress Semiconductor Corporation says the Cell processor, developed jointly by IBM, Sony and Toshiba, is optimized for the kind of real-time calculations needed in today's broadband, media-rich environment such as game consoles, consumer electronics, and advanced computing systems. It employs nine processors on a single chip, with a specially designed 300-gigabit-per-second bus knitting the processors into a single machine. The Rambus XDR memory and FlexIO processor bus interfaces account for 90% of the Cell processor signal pins, providing an unprecedented aggregate processor I/O bandwidth of approximately 100 gigabytes-per-second.
The Cypress XDR clock generator (XCG) provides four programmable differential outputs using a reference input clock of either 100 MHz or 133 MHz to enable the 6.4 GB/sec XDR memory system and the up to 8.0 GHz FlexIO processor bus. The XCG also supports spread spectrum modulation, reducing the EMI generated from the clock distribution network.
The new Cypress XCG (CY24271ZXC) offers an array of features and functions, including:
- 25-picosecond typical cycle-to-cycle jitter
- 135 dBc/Hz typical phase noise at 20 MHz offset
- 100 or 133 MHz differential clock input
- 300 to 800 MHz high-speed clock support
- Quad (open drain) differential output drivers
- Supports frequency multipliers: 3,4,5,6,8,9/2,15/2 and 15/4
- 2.5V operation
SOURCE: Cypress Semiconductor Corporation