Philips Semiconductors Increases I2C-Bus Speed to 3.4 Mb/Sec.

Philips Semiconductors' Serial I2C-bus has been extended to support speeds of up to 3.4 Mbits per second from its previous capability of 400 Kbits per second.

Originally specified to 100 kbits per second and intended for simple control and status signals, the low cost, technical versatility and simplicity of the I2C-bus ensured its popularity and it quickly began to be used for other types of data transfer, such as text and display. Hs-mode equips the bus for developments in large high-speed serial RAM, EEPROM or Flash memory, and other applications where speeds are constantly increasing.

Hs-mode is compatible with all existing I2C-bus systems, including the original Standard-mode (S-mode) specification and the previous Fast-mode (F-mode) upgrade introduced in 1992, providing 400 kbits per second transfer.

An Hs-mode master/bridge has separate pins for Hs-mode transfers and, in a pure Hs-mode system or where no bridge is used, the two F/S-mode pins can be used for other I/O functions. And as a multi-master system, the I2C-bus is particularly simple and cost effective in comparison with other high-speed buses, where additional wires and pins are needed for each slave device.