Spansion Selects Berkeley Design Automation For Multi-Chip-Package Performance Verification

Santa Clara, CA - Berkeley Design Automation Inc. announced that Spansion has selected the company's Analog FastSPICE circuit simulator for full-circuit verification of its Multi-Chip-Package (MCP) devices for high-performance, low-power, small-footprint applications such as cellular handsets, personal information devices, and GPS receivers.

"Verifying our leading-edge flash circuits with advanced multi-chip packages requires transistor-level performance simulation with over 200,000 elements, including 142 mutual inductors," said Jim Thomas, corporate vice president of product development at Spansion. "Traditional SPICE simulators cannot handle this complexity, and digital fastSPICE simulators do not have the required accuracy. Analog FastSPICE can produce true SPICE accurate results for this critical application. AFS completes what is otherwise impossible in less than 9 hours."

Berkeley Design Automation tools include Analog FastSPICE circuit simulation, RF FastSPICE periodic analyzer, and PLL Noise Analyzer. The company guarantees identical waveforms to the leading "golden" SPICE simulators down to noise floor (typically ~0.1%) while delivering 5x-10x higher performance and 5x-10x higher capacity. It achieves this by using advanced algorithms and numerical analysis techniques to rapidly solve the full-circuit matrix and the original device equations without any shortcuts that could compromise accuracy.

Design teams from top-10 semiconductor companies to leading startups use Berkeley Design Automation tools to solve big analog/RF verification problems. Typical applications include characterizing complex blocks (e.g., PLLs, ADCs, DC:DC converters, PHYs, Tx/Rx chains) and running performance simulation of full circuits (e.g., wireless transceivers, wireline transceivers, high-speed I/O macros, memories, microcontrollers, data converters, and power converters).

"We are excited that Spansion is extending the adoption of Analog FastSPICE to additional areas of their verification environment," said Ravi Subramanian, president and CEO of Berkeley Design Automation. "Full-circuit performance simulation is a key requirement for yield management in multi-chip-packages applications, and we are delighted that Analog FastSPICE provides Spansion with an accurate and efficient verification capability for this need."

For more information, see http://www.berkeley-da.com.

SOURCE: Berkeley Design Automation, Inc.