W65C02 Developer Board

The W65C02DB is used for W65C02 core microprocessor System-Chip Development, W65C02S (chip) System Development, or Embedded W65C02DB (board) Development.

Features:

W65C02S 8-bit MPU, total access to all control lines, Memory Bus, Programmable I/O Bus, PC Interface, 10 I/O lines, easy oscillator change, 32K SRAM, 32K EPROM, W65C22S Versatile Interface Adapter VIA peripheral chip, on-board matrix, PLD for Memory map decoding and ASIC design.

The PLD chip is a XILINX XC9572 for changing the chip select and I/O functions if required. To change the PLD chip to suit your own setup, you need XILINX Data Manager for the XC9572 CPLD chip. The W65C02DB includes an on-board programming header for J TAG configuration. For more details refer to the circuit diagram. The on-board W65C02S and the W65C22S device have measurement points for core power consumption. Power input is provided by an optional power board which plugs into the 10 pin power header.

WDC's Software Development System includes a W65C02S Assembler and Linker, W65C02S C-Compiler and Optimizer, and W65C02S Simulator/Debugger. WDC's PC IO daughter board can be used to connect the Developer Board to the parallel port of a PC.

Western Design Center, 2166 E. Brown Rd., Mesa, AZ 85213. Tel: 480-962-4545; Fax: 480-835-6442.