Collaboration brings together Xilinx's Virtex-II Pro Platform FPGAs and Ansoft's HFSS 3D EM design tool to optimize PCB design
San Jose, CA -- Ansoft LLC today announced a highly efficient design flow using Ansoft's 3D EM tools for modeling and optimizing high-performance electronic designs that employ Xilinx Virtex-II Pro FPGAs.
FPGA platform solutions with high bandwidth DSP and Gigahertz-speed I/O place significant demands on PCB design. With the collaboration, Xilinx and Ansoft's joint customers can achieve multi-Gigabit speeds in their designs while using widely available, low-cost materials, connectors and PCBs. Integral to this improved design flow is Ansoft's HFSS, the EDA industry's standard 3D EM design tool.
"In high-speed PCB design, it's astonishing how much extra performance you can obtain from off-the-shelf components when you optimize them with HFSS," said Suresh Subramaniam, senior design engineer at Xilinx. "With high-speed digital and analog RF components becoming more common in high-performance Xilinx PCB designs, using HFSS is necessary to assure the correct performance of the end design."
Today's Xilinx Virtex-II Pro FPGAs provide serial I/O speeds up to 10 Gb/s demanding careful signal-integrity design for proper system operation. Innovative design practices with EM simulation allow engineers to design controlled impedance transmission-line interconnects, via structures and backplane connector escape routing.
This announcement highlights the continuing collaborative effort between the two companies following Ansoft's joining of the Xilinx AllianceEDA Program. Previously, Xilinx and Ansoft presented a design flow demonstrating the use of HFSS to model and optimize a coaxial-to-PCB connector for the Xilinx ML321 test board. Currently, the companies are focused on creating a virtual evaluation (EV) kit that allows Xilinx customers to transcend traditional EV kit board testing of high-performance FPGAs and to experiment with degrees of freedom afforded through electromagnetic simulation. Many of the improved design-flow techniques resulting from this collaboration will be showcased at DesignCon 2004 (Feb. 3-4; San Jose, CA), in Xilinx's XCell publication and at future events co-sponsored by Xilinx and Ansoft.